SF.net SVN: gar:[26172] csw/mgar/pkg/openssl1/branches/lts102

[rmottola at users.sourceforge.net]

Revision: 26172
          http://sourceforge.net/p/gar/code/26172
Author:   rmottola
Date:     2017-04-30 17:38:57 +0000 (Sun, 30 Apr 2017)
Log Message:
-----------
openssl1/branches/lts102: reinstntiate some 0.9.8 targets

Modified Paths:
--------------
    csw/mgar/pkg/openssl1/branches/lts102/Makefile

Added Paths:
-----------
    csw/mgar/pkg/openssl1/branches/lts102/files/0001-more-configure-targets-1_0_2.patch

Modified: csw/mgar/pkg/openssl1/branches/lts102/Makefile
===================================================================
--- csw/mgar/pkg/openssl1/branches/lts102/Makefile	2017-04-30 16:17:38 UTC (rev 26171)
+++ csw/mgar/pkg/openssl1/branches/lts102/Makefile	2017-04-30 17:38:57 UTC (rev 26172)
@@ -85,6 +85,10 @@
 # List of engines that will be shipped in the packages
 ENGINES = 4758cca aep atalla cswift gmp chil nuron sureware ubsec padlock capi
 
+
+#some more targets we used in 0.9.8
+PATCHFILES += 0001-more-configure-targets-1_0_2.patch
+
 # This patch is taken from https://hg.openindiana.org/upstream/oracle/userland-gate/
 # original file: components/openssl/openssl-1.0.1/patches/18-compiler_opts.patch
 # I think they are smarter than me to figure what are the best compiler options

Added: csw/mgar/pkg/openssl1/branches/lts102/files/0001-more-configure-targets-1_0_2.patch
===================================================================
--- csw/mgar/pkg/openssl1/branches/lts102/files/0001-more-configure-targets-1_0_2.patch	                        (rev 0)
+++ csw/mgar/pkg/openssl1/branches/lts102/files/0001-more-configure-targets-1_0_2.patch	2017-04-30 17:38:57 UTC (rev 26172)
@@ -0,0 +1,32 @@
+From 17f42c88f0c1f345e7f110d32448aa0157339b51 Mon Sep 17 00:00:00 2001
+From: Riccardo Mottola <rmottola at opencsw.org>
+Date: Fri, 28 Apr 2017 10:04:19 +0200
+Subject: [PATCH] more configure targets 1_0_2
+
+---
+ Configure | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/Configure b/Configure
+index 4a715dc..856aea0 100755
+--- a/Configure
++++ b/Configure
+@@ -249,11 +249,15 @@ my %table=(
+  
+ #### Solaris x86 with Sun C setups
+ "solaris-x86-cc","cc:-fast -xarch=generic -O -Xa::-D_REENTRANT::-lsocket -lnsl -ldl:BN_LLONG RC4_CHAR RC4_CHUNK DES_PTR DES_UNROLL BF_PTR:${no_asm}:dlfcn:solaris-shared:-KPIC:-G -dy -z text:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"solaris-386-cc","cc:-fast -xarch=386 -O -Xa::-D_REENTRANT::-lsocket -lnsl -ldl:BN_LLONG RC4_CHAR RC4_CHUNK DES_PTR DES_UNROLL BF_PTR:${no_asm}:dlfcn:solaris-shared:-KPIC:-G -dy -z text:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"solaris-pentium-cc","cc:-fast -xpentium -O -Xa::-D_REENTRANT::-lsocket -lnsl -ldl:BN_LLONG RC4_CHAR RC4_CHUNK DES_PTR DES_UNRO LL BF_PTR:${no_asm}:dlfcn:solaris-shared:-KPIC:-G -dy -z text:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"solaris-pentium_pro-cc","cc:-fast -xarch=pentium_pro -O -Xa::-D_REENTRANT::-lsocket -lnsl -ldl:BN_LLONG RC4_CHAR RC4_CHUNK DES_PTR DES_UNROLL BF_PTR:${no_asm}:dlfcn:solaris-shared:-KPIC:-G -dy -z text:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
+ "solaris64-x86_64-cc","cc:-fast -xarch=amd64 -xstrconst -Xa -DL_ENDIAN::-D_REENTRANT::-lsocket -lnsl -ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_INT DES_UNROLL:${x86_64_asm}:elf:dlfcn:solaris-shared:-KPIC:-xarch=amd64 -G -dy -z text:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::/64",
+ 
+ #### SPARC Solaris with GNU C setups
+ "solaris-sparcv7-gcc","gcc:-O3 -fomit-frame-pointer -Wall -DB_ENDIAN -DBN_DIV2W::-D_REENTRANT::-lsocket -lnsl -ldl:BN_LLONG RC4_CHAR RC4_CHUNK DES_UNROLL BF_PTR:${no_asm}:dlfcn:solaris-shared:-fPIC:-shared:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
+ "solaris-sparcv8-gcc","gcc:-mcpu=v8 -O3 -fomit-frame-pointer -Wall -DB_ENDIAN -DBN_DIV2W::-D_REENTRANT::-lsocket -lnsl -ldl:BN_LLONG RC4_CHAR RC4_CHUNK DES_UNROLL BF_PTR:${sparcv8_asm}:dlfcn:solaris-shared:-fPIC:-shared:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"solaris-sparcv9+vis-cc","cc:-xtarget=ultra -xarch=v8plusa -xO5 -xstrconst -xdepend -Xa -DB_ENDIAN -DBN_DIV2W::-D_REENTRANT:ULTRASPARC:-lsocket -lnsl -ldl:BN_LLONG RC4_CHAR RC4_CHUNK_LL DES_PTR DES_RISC1 DES_UNROLL BF_PTR:::des_enc-sparc.o fcrypt_b.o:::::::::dlfcn:solaris-shared:-KPIC:-G -dy -z text:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
+ # -m32 should be safe to add as long as driver recognizes -mcpu=ultrasparc
+ "solaris-sparcv9-gcc","gcc:-m32 -mcpu=ultrasparc -O3 -fomit-frame-pointer -Wall -DB_ENDIAN -DBN_DIV2W::-D_REENTRANT:ULTRASPARC:-lsocket -lnsl -ldl:BN_LLONG RC4_CHAR RC4_CHUNK DES_UNROLL BF_PTR:${sparcv9_asm}:dlfcn:solaris-shared:-fPIC:-shared:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
+ "solaris64-sparcv9-gcc","gcc:-m64 -mcpu=ultrasparc -O3 -Wall -DB_ENDIAN::-D_REENTRANT:ULTRASPARC:-lsocket -lnsl -ldl:BN_LLONG RC4_CHAR RC4_CHUNK DES_INT DES_PTR DES_RISC1 DES_UNROLL BF_PTR:${sparcv9_asm}:dlfcn:solaris-shared:-fPIC:-m64 -shared:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::/64",
+-- 
+2.4.0
+

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